In the manufacture of integrated circuits as it is conventionally practiced, a substrate or wafer is provided and then different materials are deposited, in layers, on the substrate in different patterns relating to the functions which are to be performed by the different layers of materials. In effect an integrated circuit component may comprise a plurality of different layers. Since the different material layers deposited on the substrate are designed to interact with adjacent layers, the patterns which are used to deposit the material in any layer must be precisely located with reference to adjacent layers. In the fabrication of integrated circuits optical techniques are conventionally employed for transferring to the partially completed integrated circuit, a pattern to be used in depositing the material of any particular layer. The apparataus for transferring patterns and depositing materials must necessarily be located adjacent the wafer. The physical positioning of this apparatus severely restricts the characteristics of supplementary apparatus which may be used to locate the pattern transferring and material depositing apparatus, for aligning the different masks used for transferring the patterns and for verifying that the material has been deposited in proper locations. As a result the most widespread method for locating and verifying the position of parts and patterns on a wafer includes a human being peering through a microscope. The difficulties with this method should be obvious even to those not skilled in the art and flow chiefly from the characteristic frailties of the human being.
Another method which has been suggested, for at least verifying the proper location of the various parts comprising integrated circuit, includes apparatus which operates on samples of the integrated circuit after they have been manufactured. Of course, this apparatus does not have to contend with the apparatus which is necessary to the manufacturing operation. As such the verifying steps can be performed physically separate from the manufacturing steps. The difficulty with this method, however, is that if the part location is not verified there is nothing that can be done to correct the situation other than discarding the integrated circuit and beginning anew. In a nutshell this after-the-fact testing can only be used to separate the acceptable from the unacceptable and cannot be used to guide the manufacturing operation so as to maximize the yield of the manufacturing process.